Our implementation is a radix-2 architecture. This core is written in VHDL, capable of being used on any FPGA/ASIC architecture. The FFT/IFFT core is able to perform an N-point FFT/IFFT in ...

Radix-2, Radix-4 or Mixed-Radix design may be selected with parallel ... since it is dependent on the parallel samples per clock cycle configuration and the supported FFT transform sizes. An optional ...