The I2C Master / Slave Controller IP Core interfaces a microprocessor via the APB system Interconnect Fabric to an I2C Bus. The I2C is a two-wire bidirectional interface standard (SCL is Clock, ...

PCA9564 evaluation board description, features and operation modes are discussed. Source code in C language, containing communication routines between an 80C51-core microcontroller and the PCA9564 is ...

While the PCF8584 supported most parallel-bus microcontrollers/ microprocessors including the Intel 8049/8051, Motorola 6800/68000 and the Zilog Z80, the PCA9564 has been designed to be very similar ...

Bytom -- April 2, 2013-- Digital Core Design, an IP Core and System on Chip design house from Poland, has introduced its newest I2C Bus Interface soft core. It is fully compatible with Philips v. 3.0 ...

In the June and August 2003 issues of Linux Journal, my column covered the Linux kernel driver model, and the I2C subsystem was used as an example. This month, we discuss what the I2C subsystem does ...

Maxim has introduced a chip to interface devices equipped with I2C or SPI bus connections to its ‘1-wire’ bus. Called DS28E18, it is intended to knock cost out of networks that connecting I2C and SPI ...

Remember old hard drives with their giant ribbon cables? They went serial and now the power cables are way thicker than the data cables. We’ve seen the same thing in embedded devices. Talking between ...